Chip electronic parts of surface mounting type, which comprise a laminate of, for example, a high-dielectric substrate containing in the inside thereof a capacitor and a low-dielectric (insulating) substrate containing in the inside thereof a coil, have been proposed. Laminating of such a plurality of substrates different in electrical characteristics into a single chip has conventionally been carried out by (1) a process comprising providing passive elements on each of ceramic green sheets having different electrical characteristics by printing or the like technique, laminating these green sheets, and press bonding into one body or (2) a process comprising alternately printing an insulating layer and a conductive layer (e.g., a coil pattern) on previously laminated ceramic green sheets (containing in the inside thereof a capacitor) to form multiple layers and co-firing the layers.
Co-firing of a plurality of ceramic green sheets different in electrical characteristics has been accompanied with problems, such as warping or cracking of the substrate and remaining of non-sintered parts. This is because each material has its own firing temperature characteristics or shrinkage characteristics and therefore requires the respective firing atmosphere. Unless these conditions be met, the above-mentioned problems occur in co-firing.
It has been proposed to incorporate appropriate additives to the ceramic green sheet or to provide an intermediate layer comprising both the materials constituting each of the different green sheets so as to change the firing characteristics by gradations. However, such a manipulation causes deterioration of characteristics of each substrate.